1. Field of the Invention
This invention relates to semiconductor packaging technology for fabricating solder bumps on a UBM (Under Bump Metallurgy) structure over a semiconductor chip, and more particularly, to a fabrication method for strengthening flip-chip solder bumps, whereby the UBM structure is protected from oxidation and contamination to assure the solder bumps are reliably bonded to the UBM structure.
2. Description of Related Art
Flip-chip (FC) package assemblies involve an advanced type of semiconductor packaging technology characterized by having a semiconductor chip mounted in an upside-down manner over a substrate formed with an array of solder-bump pads, allowing an active surface of the chip to be mechanically bonded and electrically coupled to the substrate by means of solder bumps. Since a wire bonding (WB) process is not required for fabricating a FC package structure, the package product is fabricated with a more compact size.
In the FC technology, Sn/Pb-based solder has poor bondability with the aluminum-based I/O pad, and the UBM structure has good bondability with both the Sn/Pb-based solder and aluminum-based I/O pad, so a UBM structure is usually formed on each aluminum-based I/O (input/output) pad formed on the active surface of the chip. After solder bumps are formed over the UBM structure, a reflow process is performed to bond and align the solder bumps in position over the UBM structure on the I/O pads.
The process of forming flip-chip solder bumps can be implemented through various techniques, such as electroplating, screen printing, and evaporation, to name just a few.
However, one drawback of conventional flip-chip solder bumping technologies is exposing the UBM structure to the atmosphere prior to bonding the solder bumps thereon, whereby the exposed UBM structure would be easily subject to oxidation and contamination by chemicals used in lithographic processes, thereby undesirably degrading the bondability between the UBM structure and the solder bumps.
Related prior art references include, for example, the following patents:
U.S. Patent Application No. 2002/0072215 xe2x80x9cMETHOD FOR FORMING BARRIER LAYERS FOR SOLDER BUMPSxe2x80x9d;
U.S. Pat. No. 5,268,072 xe2x80x9cETCHING PROCESSES FOR AVOIDING EDGE STRESS IN SEMICONDUCTOR CHIP SOLDER BUMPSxe2x80x9d;
U.S. Pat. No. 5,503,286 xe2x80x9cELECTROPLATED SOLDER TERMINALxe2x80x9d;
U.S. Pat. No. 5,937,320 xe2x80x9cBARRIER LAYERS FOR ELECTROPLATED SNPB EUTECTIC SOLDER JOINTSxe2x80x9d;
U.S. Pat. No. 6,297,140 xe2x80x9cMETHOD TO PLATE C4 TO COPPER STUDxe2x80x9d; to name just a few.
Among the above references, U.S. Patent Application 2002/0072215 proposes a solution to the aforementioned problem by forming a temporary metal layer over the UBM structure for protecting the UBM structure against oxidation and contamination, and finally using a chemical etchant to etch away the temporary metal layer. One drawback to this solution, however, is that it would make the overall fabrication processes more complex to implement; and still one drawback is that the chemical etchant is pollutant and environment unfriendly. All the other aforementioned U.S. patents provide no solution to the problem of the UBM structure being subjected to oxidation and contamination during the fabrication processes.
It is therefore an objective of this invention to provide a fabrication method for strengthening flip-chip solder bumps, which is able to protect a UBM structure against oxidation and contamination to assure a solder bump to be reliably bonded to the UBM structure and thereby assure the quality of the flip-chip package.
It is another objective of this invention to provide a fabrication method for strengthening flip-chip solder bumps, which can be implemented without having to utilize chemical etchants thereby making the fabrication method more environment friendly.
In accordance with the above and other objectives, this invention proposes a fabrication method for strengthening solder bumps on a UBM (Under Bump Metallurgy) structure over a semiconductor chip to protect the UBM structure from oxidation and contamination to assure the solder bumps are reliably bonded to the UBM structure and thereby assure the quality of the semiconductor package.
The fabrication method according to the invention is characterized by formation of a dielectric layer made of benzo-cyclo-butene (BCB) or polyimide on the surface of UBM, to protect the UBM structure against oxidation and contamination during a solder bump forming process. In subsequent processes, the dielectric layer is removed by a plasma etching technique. Since the plasma etching process can be implemented without using chemical etchants, the invention is more environmentally friendly than the prior art.